The present invention relates to a defect reviewing method and apparatus for zooming in on a defect of a thin-film device such as a semiconductor circuit substrate or a liquid crystal display substrate so as to review the defect.
A thin-film device such as a semiconductor circuit device, a liquid crystal display or a magnetic head is manufactured through a large number of processes. For example, the number of processes may reach several hundreds. Accordingly, these thin-film devices are completed by processing with a large number of processing machines. When there is an abnormality in a processing machine or something unsatisfactory in manufacturing conditions, the fraction defective of final products will be increased to drop the yield. Therefore, processed substrates are inspected by use of an inspection apparatus. Due to time and labor constraints, it is impossible to inspect all the processed substrates in each manufacturing process. Usually for each series of some processes, inspection is performed upon processed substrates sampled from each lot, each unit of processed substrates, or each combination of the lot and the unit. Here, the processed substrate means a minimum unit to be processed as a product. In the case of a semiconductor circuit device, the processed substrate designates one semiconductor wafer.
Inspection of processed substrates is categorized into foreign-matter inspection for inspecting the existence of foreign matters and visual inspection for inspecting the existence of pattern abnormality or the like. For example, in foreign-matter inspection of a semiconductor wafer, the surface of the semiconductor wafer is scanned with a laser so that the existence of scattering light is detected. Thus, information about the positions and number of foreign matters is obtained. In defect inspection for performing both the foreign-matter inspection and the visual inspection, for example, an image of a circuit pattern in one region of a semiconductor wafer is captured by an enlarging imaging optical system, and compared with an image of the same pattern in another region adjacent thereto, so as to detect abnormality of the pattern. Foreign matters and visual abnormality will be referred to as “defects” collectively. The visual abnormality includes adhesion of foreign matters, dirt, short-circuit and disconnection of wiring, etc.
Whether a processing machine is abnormal or not is often determined based on management parameters such as the number or density of defects detected by an inspection apparatus. When the number of defects exceeds a predetermined reference value, it is concluded that abnormality occurs in the processing machine. Each defect is magnified and picked up by a reviewing apparatus such as an optical microscope or a scanning electron microscope (hereinafter referred to as “SEM”). Thus, detailed information such as size, shape and texture is acquired, and inspection of details such as elementary analysis and sectional observation is performed. A processing machine contributing to the defect and the contents of failure thereof are specified based on the inspection of details. Then, based on the specified results, measures for the processing machine or processes are taken to prevent the yield from lowering.
In order to make such a reviewing work automatic and efficient, in recent years, there has been developed a reviewing apparatus having a function (automatic defect review, hereinafter referred to as “ADR”) of automatically acquiring magnified images of foreign matters and defects based on inspection data from a foreign-matter inspection apparatus or a visual inspection apparatus.
JP-A-2000-30652 discloses an example of such a reviewing apparatus. JP-A-7-201946 discloses a method for performing automatic defect classification (hereinafter referred to as “ADC”) on acquired images in conformity with specific rules.
When a defect of a semiconductor wafer is detected by an inspection apparatus and a magnified image of the defect is picked up by a reviewing apparatus, semiconductor wafer alignment is performed. The semiconductor wafer alignment means alignment between a stage coordinate system and a semiconductor wafer coordinate system in the inspection apparatus and the reviewing apparatus. The stage coordinate system depends on movable axes of a stage of each piece of apparatus. Therefore, the stage coordinate system is peculiar to each piece of apparatus. The semiconductor wafer coordinate system depends on each individual semiconductor wafer. In the case of a semiconductor wafer having a pattern formed therein, the semiconductor wafer coordinate system is generally defined along a die of the pattern. On the other hand, in the case of a semiconductor wafer having no pattern, the semiconductor wafer coordinate system is defined based on the positional relationship between the contour of the semiconductor wafer and a V notch or orientation flat thereof. When alignment between the stage coordinate system and the semiconductor wafer coordinate system is performed in the inspection apparatus and the reviewing apparatus respectively in their corresponding positions on the semiconductor wafer, the coordinate system in inspection with the inspection apparatus coincides with the coordinate system in review with the reviewing apparatus.
In fact, however, defect coordinate data output from the inspection apparatus include a semiconductor wafer alignment error or a defect detection position error at the time of inspection. Therefore, in spite of the semiconductor wafer alignment performed in the reviewing apparatus, a desired defect may not always come into view.
ADR is generally executed in consideration of such errors. That is, even when defect coordinate data output from the inspection apparatus include an error, the size of an observation view of a defect search image in the reviewing apparatus is selected so that the defect comes into the observation view. The position of the defect is searched in the defect search image, and a magnified image is picked up around the search position. Thus, a defect image is acquired.
However, when the defect coordinate data output from the inspection apparatus include a large error, the view size of the defect search image has to be set to be larger. Accordingly, the area ratio of the defect portion to the screen becomes smaller. Therefore, the probability of failure in recognizing the defect portion increases so that the reliability of the search is lowered. It is therefore desired that the view size of the search image in the reviewing apparatus is as small as possible. In the background art, the view size of the search image in the reviewing apparatus is determined by user's trial and error. Specifically, the view size is changed while observing the image in a plurality of defect coordinate positions. Thus, the view size is determined so that the defect is actually included in the screen.
There is another case where the defect coordinates output from the inspection apparatus are compared with the coordinates of a defect observed actually by the reviewing apparatus so as to perform fine adjustment on an error of the defect coordinates. This will be hereinafter referred to as “fine alignment”. The fine alignment is specifically performed as follows. First, the center of the observation view in the reviewing apparatus is moved to the position of the defect coordinates output from the inspection apparatus, and a defect existing near the region of the observation view is searched. The position of the detected defect is specified. Such an operation is performed once or repeated a plurality of times. Coordinate transformation is performed to minimize an error between the specified coordinates of the actual defect position and the defect coordinates output from the inspection apparatus. A method for efficiently performing this fine alignment is disclosed in JP-A-2001-338601.
Further, JP-A-8-220005, JP-A-2000-215839 and JP-A-2000-222575 disclose methods for correcting an error of defect coordinates using a calibrating wafer.